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The Export Control (Amendment) Regulations 2025

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11 Amendments to Category 3 - Electronics

(1) The section headed Category 3 - Electronics is amended as follows. (2) In the section headed 3A Systems, Equipment and Components— (a) in the Note to entry 3A001.a.— (i) for ““Film type integrated circuits”” substitute “‘Film type integrated circuits’”; (ii) for ““Three dimensional integrated circuits”” substitute “‘Three dimensional integrated circuits’”; (iii) after “ (“MMICs”).” insert— Technical Notes: For the purposes of 3A001.a., Note: 1. | ‘Film type integrated circuit’ is an array of “circuit elements” and metallic interconnections formed by deposition of a thick or thin film on an insulating “substrate”. 2. | ‘Three dimensional integrated circuit’ is a collection of semiconductor dies or active device layers, integrated together, and having through semiconductor via connections passing completely through an interposer, substrate, die or layer to establish interconnections between the device layers. An interposer is an interface that enables electrical connections. ; (b) in entry 3A001.a.2., for “analogue-to-digital converters, integrated circuits that contain analogue-to-digital converters and store or process the digitised data, digital-to-analogue converters” substitute “Analogue-to-Digital Converters (ADCs), integrated circuits that contain ADCs and store or process the digitised data, Digital-to-Analogue Converters (DACs)”; (c) in entry 3A001.a.5.b., for “Digital-to-Analogue Converters (DAC)” substitute “DACs”; (d) in entry 3A001.a.5.b.1., after “10 bit or more” insert “,”; (e) in the Note to entry 3A001.a.7.— (i) after “(CPLDs)” insert “;”; (ii) after “ (FPGAs)” insert “;”; (iii) after “ (FPLAs)” insert “;”; (iv) after “ (FPICs)” insert “.”; (f) in entry 3A001.a.10.b., for ““basic gate propagation delay time”” substitute “‘basic gate propagation delay time’”; (g) at the end of entry 3A001.a.10., insert— Technical Notes: For the purposes of 3A001.a.10.b: 1. | ‘Basic gate propagation delay time’ is the propagation delay time value corresponding to the basic gate used in a “monolithic integrated circuit”. For a ‘family’ of “monolithic integrated circuits”, this may be specified either as the propagation delay time per typical gate within the given ‘family’ or as the typical propagation delay time per gate within the given ‘family’. 2. | ‘Basic gate propagation delay time’ is not to be confused with the input/output delay time of a complex “monolithic integrated circuit”. 3. | ‘Family’ consists of all integrated circuits to which all of the following are applied as their manufacturing methodology and specifications except their respective functions: a. | The common hardware and software architecture; b. | The common design and process technology; and c. | The common basic characteristics. ; (h) in the N.B.1. to entry 3A001.a.14., for “analogue-to-digital converter integrated circuits” substitute “Analogue-to-Digital Converter (ADC) integrated circuits,”; (i) in the N.B.2. to entry 3A001.a.14., after “devices” insert “,”; (j) in entry 3A001.b.1.d., for “‘dual mode’.” substitute “‘dual mode’;”; (k) in the N.B. to entry 3A001.b.2., after “ shifter” insert “,”; (l) in Note 1 to entry 3A001.b.3., for “through” substitute “to”; (m) in entry 3A001.b.4., for “solid state”, in both places it occurs, substitute “solid-state”; (n) in entry 3A001.b.4.e.3., for “90 GHz; or” substitute “90 GHz.”; (o) in the N.B.1. to entry 3A001.b.4., after “amplifiers” insert “,”; (p) in the N.B.2. to entry 3A001.b.4., after “‘transmit modules’” insert “,”; (q) in entry 3A001.b.7.c.2., after “GHz;”, insert “or”; (r) in entry 3A001.b.7.c.3., omit “or”; (s) in entry 3A001.b.11., including the Technical Note, for “synthesiser”, in both places it occurs, substitute “synthesizer”; (t) in entry 3A001.c.1.b., after “1 GHz” omit “,”; (u) in the Technical Notes to entry 3A001.e.1., for “Ohms” substitute “ohms”; (v) in entry 3A001.e.3.c.— (i) for ““overall current density”” substitute “‘overall current density’”; (ii) at the end, insert— Technical Note: For the purposes of 3.A001.e.3.c., ‘overall current density’ is the total number of ampere-turns in the coil (i.e., the sum of the number of turns multiplied by the maximum current carried by each turn) divided by the total cross-section of the coil (comprising the superconducting filaments, the metallic matrix in which the superconducting filaments are embedded, the encapsulating material, any cooling channels, etc.). ; (w) in Note 1 to entry 3A001.g.— (i) after “(SCRs)” insert “;”; (ii) after “ (ETTs)” insert “;”; (iii) after “ (LTTs)” insert “;”; (iv) after “ (IGCTs)” insert “;” (v) after “(GTOs)” insert “;”; (vi) after “(MCTs)” insert “;”; (vii) after “Solidtrons” insert “.”; (x) in Note 2 to entry 3A001.h.— (i) after “ (JFETs)” insert “;”; (ii) after “ (VJFETs)” insert “;”; (iii) after “ (MOSFETs)” insert “;”; (iv) for “ (DMOSFET)” substitute “(DMOSFETs);”; (v) for “(IGBT)” substitute “(IGBTs);”; (vi) after “ (HEMTs)” insert “;”; (vii) after “ (BJTs)” insert “;”; (viii) after “ (SCRs)” insert “;”; (ix) after “ (GTOs)” insert “;”; (x) after “ (ETOs)” insert “;” (xi) after “PiN Diodes” insert “;” (xii) after “Schottky Diodes” insert “.”; (y) for entry 3A002.a.7., including the Note, substitute— 7. | Real-time oscilloscopes having all of the following: a. | A vertical root-mean-square (rms) noise voltage of less than 2% of full-scale at the vertical scale setting that provides the greatest noise value; and b. | An ‘upper 3dB frequency’ greater than 90 GHz on any channel. Note: | 3A002.a.7 does not control equivalent-time sampling oscilloscopes. Technical Notes: For the purposes of 3A002.a.7.b.: 1. | ‘Upper 3dB frequency’ is the greater of: a. | The specified 3dB bandwidth of the oscilloscope; or b. | The maximum upper end of the frequency range of any ‘movable bandwidth window’. 2. | ‘Movable bandwidth window’ is a bandpass filter with a user-definable centre frequency or span. ; (z) in entry 3A002.h.1.d., after “14 bit or more” insert “,”. (3) In the section headed 3B Test, Inspection and Production Equipment— (a) in the Technical Note to entry 3B001.f.1.b., after “0,35” insert “.”; (b) in the Note to entry 3B001.f.2— (i) after “printing tools” insert “;”; (ii) after “embossing tools” insert “;”; (iii) after “lithography tools” insert “;”; (iv) after “(S-FIL) tools” insert “.”. (4) In the section headed 3C Materials, in entry 3C005.b., at the end insert— N.B. | For materials consisting of a ‘substrate’ specified in 3C005 with at least one epitaxial layer, see 3C001 or 3C006. . (5) In the section headed 3E Technology— (a) in entry 3E003.b., for “high electron mobility transistors (HEMT), hetero-bipolar transistors (HBT)” substitute “High Electron Mobility Transistors (HEMTs), Heterojunction Bipolar Transistors (HBTs)”; (b) in the Note to entry 3E003.b. — (i) for “high electron mobility transistors (HEMT)” substitute “HEMTs”; (ii) for “hetero junction bipolar transistors (HBT)” substitute “HBTs”.

Your change, as a redline

11 Amendments to Category 3 - Electronics

(1) The section headed Category 3 - Electronics is amended as follows. (2) In the section headed 3A Systems, Equipment and Components— (a) in the Note to entry 3A001.a.— (i) for ““Film type integrated circuits”” substitute “‘Film type integrated circuits’”; (ii) for ““Three dimensional integrated circuits”” substitute “‘Three dimensional integrated circuits’”; (iii) after “ (“MMICs”).” insert— Technical Notes: For the purposes of 3A001.a., Note: 1. | ‘Film type integrated circuit’ is an array of “circuit elements” and metallic interconnections formed by deposition of a thick or thin film on an insulating “substrate”. 2. | ‘Three dimensional integrated circuit’ is a collection of semiconductor dies or active device layers, integrated together, and having through semiconductor via connections passing completely through an interposer, substrate, die or layer to establish interconnections between the device layers. An interposer is an interface that enables electrical connections. ; (b) in entry 3A001.a.2., for “analogue-to-digital converters, integrated circuits that contain analogue-to-digital converters and store or process the digitised data, digital-to-analogue converters” substitute “Analogue-to-Digital Converters (ADCs), integrated circuits that contain ADCs and store or process the digitised data, Digital-to-Analogue Converters (DACs)”; (c) in entry 3A001.a.5.b., for “Digital-to-Analogue Converters (DAC)” substitute “DACs”; (d) in entry 3A001.a.5.b.1., after “10 bit or more” insert “,”; (e) in the Note to entry 3A001.a.7.— (i) after “(CPLDs)” insert “;”; (ii) after “ (FPGAs)” insert “;”; (iii) after “ (FPLAs)” insert “;”; (iv) after “ (FPICs)” insert “.”; (f) in entry 3A001.a.10.b., for ““basic gate propagation delay time”” substitute “‘basic gate propagation delay time’”; (g) at the end of entry 3A001.a.10., insert— Technical Notes: For the purposes of 3A001.a.10.b: 1. | ‘Basic gate propagation delay time’ is the propagation delay time value corresponding to the basic gate used in a “monolithic integrated circuit”. For a ‘family’ of “monolithic integrated circuits”, this may be specified either as the propagation delay time per typical gate within the given ‘family’ or as the typical propagation delay time per gate within the given ‘family’. 2. | ‘Basic gate propagation delay time’ is not to be confused with the input/output delay time of a complex “monolithic integrated circuit”. 3. | ‘Family’ consists of all integrated circuits to which all of the following are applied as their manufacturing methodology and specifications except their respective functions: a. | The common hardware and software architecture; b. | The common design and process technology; and c. | The common basic characteristics. ; (h) in the N.B.1. to entry 3A001.a.14., for “analogue-to-digital converter integrated circuits” substitute “Analogue-to-Digital Converter (ADC) integrated circuits,”; (i) in the N.B.2. to entry 3A001.a.14., after “devices” insert “,”; (j) in entry 3A001.b.1.d., for “‘dual mode’.” substitute “‘dual mode’;”; (k) in the N.B. to entry 3A001.b.2., after “ shifter” insert “,”; (l) in Note 1 to entry 3A001.b.3., for “through” substitute “to”; (m) in entry 3A001.b.4., for “solid state”, in both places it occurs, substitute “solid-state”; (n) in entry 3A001.b.4.e.3., for “90 GHz; or” substitute “90 GHz.”; (o) in the N.B.1. to entry 3A001.b.4., after “amplifiers” insert “,”; (p) in the N.B.2. to entry 3A001.b.4., after “‘transmit modules’” insert “,”; (q) in entry 3A001.b.7.c.2., after “GHz;”, insert “or”; (r) in entry 3A001.b.7.c.3., omit “or”; (s) in entry 3A001.b.11., including the Technical Note, for “synthesiser”, in both places it occurs, substitute “synthesizer”; (t) in entry 3A001.c.1.b., after “1 GHz” omit “,”; (u) in the Technical Notes to entry 3A001.e.1., for “Ohms” substitute “ohms”; (v) in entry 3A001.e.3.c.— (i) for ““overall current density”” substitute “‘overall current density’”; (ii) at the end, insert— Technical Note: For the purposes of 3.A001.e.3.c., ‘overall current density’ is the total number of ampere-turns in the coil (i.e., the sum of the number of turns multiplied by the maximum current carried by each turn) divided by the total cross-section of the coil (comprising the superconducting filaments, the metallic matrix in which the superconducting filaments are embedded, the encapsulating material, any cooling channels, etc.). ; (w) in Note 1 to entry 3A001.g.— (i) after “(SCRs)” insert “;”; (ii) after “ (ETTs)” insert “;”; (iii) after “ (LTTs)” insert “;”; (iv) after “ (IGCTs)” insert “;” (v) after “(GTOs)” insert “;”; (vi) after “(MCTs)” insert “;”; (vii) after “Solidtrons” insert “.”; (x) in Note 2 to entry 3A001.h.— (i) after “ (JFETs)” insert “;”; (ii) after “ (VJFETs)” insert “;”; (iii) after “ (MOSFETs)” insert “;”; (iv) for “ (DMOSFET)” substitute “(DMOSFETs);”; (v) for “(IGBT)” substitute “(IGBTs);”; (vi) after “ (HEMTs)” insert “;”; (vii) after “ (BJTs)” insert “;”; (viii) after “ (SCRs)” insert “;”; (ix) after “ (GTOs)” insert “;”; (x) after “ (ETOs)” insert “;” (xi) after “PiN Diodes” insert “;” (xii) after “Schottky Diodes” insert “.”; (y) for entry 3A002.a.7., including the Note, substitute— 7. | Real-time oscilloscopes having all of the following: a. | A vertical root-mean-square (rms) noise voltage of less than 2% of full-scale at the vertical scale setting that provides the greatest noise value; and b. | An ‘upper 3dB frequency’ greater than 90 GHz on any channel. Note: | 3A002.a.7 does not control equivalent-time sampling oscilloscopes. Technical Notes: For the purposes of 3A002.a.7.b.: 1. | ‘Upper 3dB frequency’ is the greater of: a. | The specified 3dB bandwidth of the oscilloscope; or b. | The maximum upper end of the frequency range of any ‘movable bandwidth window’. 2. | ‘Movable bandwidth window’ is a bandpass filter with a user-definable centre frequency or span. ; (z) in entry 3A002.h.1.d., after “14 bit or more” insert “,”. (3) In the section headed 3B Test, Inspection and Production Equipment— (a) in the Technical Note to entry 3B001.f.1.b., after “0,35” insert “.”; (b) in the Note to entry 3B001.f.2— (i) after “printing tools” insert “;”; (ii) after “embossing tools” insert “;”; (iii) after “lithography tools” insert “;”; (iv) after “(S-FIL) tools” insert “.”. (4) In the section headed 3C Materials, in entry 3C005.b., at the end insert— N.B. | For materials consisting of a ‘substrate’ specified in 3C005 with at least one epitaxial layer, see 3C001 or 3C006. . (5) In the section headed 3E Technology— (a) in entry 3E003.b., for “high electron mobility transistors (HEMT), hetero-bipolar transistors (HBT)” substitute “High Electron Mobility Transistors (HEMTs), Heterojunction Bipolar Transistors (HBTs)”; (b) in the Note to entry 3E003.b. — (i) for “high electron mobility transistors (HEMT)” substitute “HEMTs”; (ii) for “hetero junction bipolar transistors (HBT)” substitute “HBTs”.

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